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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h File Reference</title>
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  <div class="headertitle"><div class="title">stm32h7xx_hal_tim_ex.h File Reference</div></div>
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<p>Header file of TIM HAL Extended module.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="stm32h7xx__hal__def_8h_source.html">stm32h7xx_hal_def.h</a>&quot;</code><br />
</div>
<p><a href="stm32h7xx__hal__tim__ex_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
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Classes</h2></td></tr>
<tr class="memitem:TIM_5FHallSensor_5FInitTypeDef" id="r_TIM_5FHallSensor_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___hall_sensor___init_type_def.html">TIM_HallSensor_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">TIM Hall sensor Configuration Structure definition.  <a href="struct_t_i_m___hall_sensor___init_type_def.html#details">More...</a><br /></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga5156e463b51b1a7d92e6d87c2be4563a" id="r_ga5156e463b51b1a7d92e6d87c2be4563a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga5156e463b51b1a7d92e6d87c2be4563a">TIM_TIM1_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga2e3eb3f4f99db6c14b3ce91bebfe8d07" id="r_ga2e3eb3f4f99db6c14b3ce91bebfe8d07"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga2e3eb3f4f99db6c14b3ce91bebfe8d07">TIM_TIM1_ETR_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1e5c447a1de2571985f74ca5ee201c56">TIM1_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:ga734d16e8c8e368bedc159f97422e26b9" id="r_ga734d16e8c8e368bedc159f97422e26b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga734d16e8c8e368bedc159f97422e26b9">TIM_TIM1_ETR_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga269809ebc603562522c733f7b518bcc3">TIM1_AF1_ETRSEL_1</a></td></tr>
<tr class="memitem:gaa5a7accd83b70cbaf790bd26fd8e4538" id="r_gaa5a7accd83b70cbaf790bd26fd8e4538"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gaa5a7accd83b70cbaf790bd26fd8e4538">TIM_TIM1_ETR_ADC1_AWD1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga269809ebc603562522c733f7b518bcc3">TIM1_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga1e5c447a1de2571985f74ca5ee201c56">TIM1_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga4ee5007933efeaae07c745062ffc2776" id="r_ga4ee5007933efeaae07c745062ffc2776"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga4ee5007933efeaae07c745062ffc2776">TIM_TIM1_ETR_ADC1_AWD2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga891aa4abfb026ec12d7e78366c57861c">TIM1_AF1_ETRSEL_2</a>)</td></tr>
<tr class="memitem:ga6a448a71300d1f8f81e6eb0dcc31f15a" id="r_ga6a448a71300d1f8f81e6eb0dcc31f15a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga6a448a71300d1f8f81e6eb0dcc31f15a">TIM_TIM1_ETR_ADC1_AWD3</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga891aa4abfb026ec12d7e78366c57861c">TIM1_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga1e5c447a1de2571985f74ca5ee201c56">TIM1_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga95a93aa08f9c8b8d58dd6e30e30f41c1" id="r_ga95a93aa08f9c8b8d58dd6e30e30f41c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga95a93aa08f9c8b8d58dd6e30e30f41c1">TIM_TIM1_ETR_ADC3_AWD1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga891aa4abfb026ec12d7e78366c57861c">TIM1_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga269809ebc603562522c733f7b518bcc3">TIM1_AF1_ETRSEL_1</a>)</td></tr>
<tr class="memitem:gad3cbe27b5e94414e39b52843054a4cee" id="r_gad3cbe27b5e94414e39b52843054a4cee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gad3cbe27b5e94414e39b52843054a4cee">TIM_TIM1_ETR_ADC3_AWD2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga891aa4abfb026ec12d7e78366c57861c">TIM1_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga269809ebc603562522c733f7b518bcc3">TIM1_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga1e5c447a1de2571985f74ca5ee201c56">TIM1_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:gaf0be1d196c76f0d45c4f41d61d4af0f6" id="r_gaf0be1d196c76f0d45c4f41d61d4af0f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gaf0be1d196c76f0d45c4f41d61d4af0f6">TIM_TIM1_ETR_ADC3_AWD3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4b00c39efe4c62ef0c7391da38f4d93e">TIM1_AF1_ETRSEL_3</a></td></tr>
<tr class="memitem:gabcec3c5e9dad306b68d34e5b9257a281" id="r_gabcec3c5e9dad306b68d34e5b9257a281"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gabcec3c5e9dad306b68d34e5b9257a281">TIM_TIM8_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gadcbcb76d19c2ccb5ae46fdc7e7d88f8b" id="r_gadcbcb76d19c2ccb5ae46fdc7e7d88f8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gadcbcb76d19c2ccb5ae46fdc7e7d88f8b">TIM_TIM8_ETR_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:gae93f8a76facb81f8d962bb7c88dc25f0" id="r_gae93f8a76facb81f8d962bb7c88dc25f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gae93f8a76facb81f8d962bb7c88dc25f0">TIM_TIM8_ETR_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8115191f924a8817c45e04078725f242">TIM8_AF1_ETRSEL_1</a></td></tr>
<tr class="memitem:ga7a832c5903108f2a06208c58585f7579" id="r_ga7a832c5903108f2a06208c58585f7579"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga7a832c5903108f2a06208c58585f7579">TIM_TIM8_ETR_ADC2_AWD1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga8115191f924a8817c45e04078725f242">TIM8_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:gae0c7be84fda65b37b00a8896b98775c3" id="r_gae0c7be84fda65b37b00a8896b98775c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gae0c7be84fda65b37b00a8896b98775c3">TIM_TIM8_ETR_ADC2_AWD2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga7dc91956b73a05f0ab3465a124e27e97">TIM8_AF1_ETRSEL_2</a>)</td></tr>
<tr class="memitem:ga02c57d201dbc0416eed0e333a6347b5b" id="r_ga02c57d201dbc0416eed0e333a6347b5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga02c57d201dbc0416eed0e333a6347b5b">TIM_TIM8_ETR_ADC2_AWD3</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga7dc91956b73a05f0ab3465a124e27e97">TIM8_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga7cb16632bf98d6961d21172aa42373e3" id="r_ga7cb16632bf98d6961d21172aa42373e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga7cb16632bf98d6961d21172aa42373e3">TIM_TIM8_ETR_ADC3_AWD1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga7dc91956b73a05f0ab3465a124e27e97">TIM8_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga8115191f924a8817c45e04078725f242">TIM8_AF1_ETRSEL_1</a>)</td></tr>
<tr class="memitem:ga84b90475edbe94a4cdbef6f5f602ac9b" id="r_ga84b90475edbe94a4cdbef6f5f602ac9b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga84b90475edbe94a4cdbef6f5f602ac9b">TIM_TIM8_ETR_ADC3_AWD2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga7dc91956b73a05f0ab3465a124e27e97">TIM8_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga8115191f924a8817c45e04078725f242">TIM8_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga8f39897f883d4efa8357d1ba28bc100b" id="r_ga8f39897f883d4efa8357d1ba28bc100b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga8f39897f883d4efa8357d1ba28bc100b">TIM_TIM8_ETR_ADC3_AWD3</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga97fe71b195c1bbc5175e3db42d09c062">TIM8_AF1_ETRSEL_3</a></td></tr>
<tr class="memitem:ga05e1c800a3f8e7eb60b50f446cf321f7" id="r_ga05e1c800a3f8e7eb60b50f446cf321f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga05e1c800a3f8e7eb60b50f446cf321f7">TIM_TIM2_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga79a125bc7559dc01f8de056e19f11972" id="r_ga79a125bc7559dc01f8de056e19f11972"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga79a125bc7559dc01f8de056e19f11972">TIM_TIM2_ETR_COMP1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaaa7a4ed17a8432d8c81e31e32dd87e20">TIM2_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga76dfe019f143b4bff5ba2c2e1a38a387" id="r_ga76dfe019f143b4bff5ba2c2e1a38a387"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga76dfe019f143b4bff5ba2c2e1a38a387">TIM_TIM2_ETR_COMP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga6a1413b9834ebc2b96c8eb27b74b0fdc">TIM2_AF1_ETRSEL_1</a>)</td></tr>
<tr class="memitem:gae69141882323f8b603da7a0343995dca" id="r_gae69141882323f8b603da7a0343995dca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gae69141882323f8b603da7a0343995dca">TIM_TIM2_ETR_RCC_LSE</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga6a1413b9834ebc2b96c8eb27b74b0fdc">TIM2_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga901919d24f481b3ca744ff06cd98bdb8" id="r_ga901919d24f481b3ca744ff06cd98bdb8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga901919d24f481b3ca744ff06cd98bdb8">TIM_TIM2_ETR_SAI1_FSA</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga38cf3fbfe20afba58f315ace95c88016">TIM2_AF1_ETRSEL_2</a></td></tr>
<tr class="memitem:gab369084ac6b74b818f48995770cf2221" id="r_gab369084ac6b74b818f48995770cf2221"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gab369084ac6b74b818f48995770cf2221">TIM_TIM2_ETR_SAI1_FSB</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga38cf3fbfe20afba58f315ace95c88016">TIM2_AF1_ETRSEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:gad86579b249d2c04a99c8412a8c72af97" id="r_gad86579b249d2c04a99c8412a8c72af97"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gad86579b249d2c04a99c8412a8c72af97">TIM_TIM3_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaea6cbaddf4da816fd4afd13ad7953079" id="r_gaea6cbaddf4da816fd4afd13ad7953079"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gaea6cbaddf4da816fd4afd13ad7953079">TIM_TIM3_ETR_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaf25073af3e775f18278b711d3719957">TIM3_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:ga5df745d19761f4c212140c70d4271692" id="r_ga5df745d19761f4c212140c70d4271692"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga5df745d19761f4c212140c70d4271692">TIM_TIM5_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaca05dbe7ce7bc979d5e30f355285a51c" id="r_gaca05dbe7ce7bc979d5e30f355285a51c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gaca05dbe7ce7bc979d5e30f355285a51c">TIM_TIM5_ETR_SAI2_FSA</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabaeb0ecb379e37e51722902144404520">TIM5_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:ga11e3c0b2d38048d8d15e8623ff61a408" id="r_ga11e3c0b2d38048d8d15e8623ff61a408"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga11e3c0b2d38048d8d15e8623ff61a408">TIM_TIM5_ETR_SAI2_FSB</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga92b38d638ecda48a0da085cfd8ce86bf">TIM5_AF1_ETRSEL_1</a></td></tr>
<tr class="memitem:gac6ad331bf73260161a6e9c3b2ee412f3" id="r_gac6ad331bf73260161a6e9c3b2ee412f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gac6ad331bf73260161a6e9c3b2ee412f3">TIM_TIM5_ETR_SAI4_FSA</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabaeb0ecb379e37e51722902144404520">TIM5_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:ga5dd267b5ce57d4c9d0736f3da988d9d9" id="r_ga5dd267b5ce57d4c9d0736f3da988d9d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga5dd267b5ce57d4c9d0736f3da988d9d9">TIM_TIM5_ETR_SAI4_FSB</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga92b38d638ecda48a0da085cfd8ce86bf">TIM5_AF1_ETRSEL_1</a></td></tr>
<tr class="memitem:gae50809628b49070fd6720a5a28e5e175" id="r_gae50809628b49070fd6720a5a28e5e175"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gae50809628b49070fd6720a5a28e5e175">TIM_TIM23_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga818b9fe379711929c05c8cd61dcd45f2" id="r_ga818b9fe379711929c05c8cd61dcd45f2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga818b9fe379711929c05c8cd61dcd45f2">TIM_TIM23_ETR_COMP1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaaa7a4ed17a8432d8c81e31e32dd87e20">TIM2_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga7365daffa2ee6ff2680a2cce2251499b" id="r_ga7365daffa2ee6ff2680a2cce2251499b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga7365daffa2ee6ff2680a2cce2251499b">TIM_TIM23_ETR_COMP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga6a1413b9834ebc2b96c8eb27b74b0fdc">TIM2_AF1_ETRSEL_1</a>)</td></tr>
<tr class="memitem:ga7baa5fe8462ef94cae713e4367d9d3e8" id="r_ga7baa5fe8462ef94cae713e4367d9d3e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga7baa5fe8462ef94cae713e4367d9d3e8">TIM_TIM24_ETR_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga02942441fbd3f26678ff95395a09b89c" id="r_ga02942441fbd3f26678ff95395a09b89c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga02942441fbd3f26678ff95395a09b89c">TIM_TIM24_ETR_SAI4_FSA</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabaeb0ecb379e37e51722902144404520">TIM5_AF1_ETRSEL_0</a></td></tr>
<tr class="memitem:gade1f234256056c4a8739abb2c6e35f26" id="r_gade1f234256056c4a8739abb2c6e35f26"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gade1f234256056c4a8739abb2c6e35f26">TIM_TIM24_ETR_SAI4_FSB</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga92b38d638ecda48a0da085cfd8ce86bf">TIM5_AF1_ETRSEL_1</a></td></tr>
<tr class="memitem:gab59f38eafd161977848d82893351f552" id="r_gab59f38eafd161977848d82893351f552"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#gab59f38eafd161977848d82893351f552">TIM_TIM24_ETR_SAI1_FSA</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga6a1413b9834ebc2b96c8eb27b74b0fdc">TIM2_AF1_ETRSEL_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga0ff3eda56bcb98d020fa1b1573c4f912">TIM8_AF1_ETRSEL_0</a>)</td></tr>
<tr class="memitem:ga0bf08e73da65956929e36e05e4873c42" id="r_ga0bf08e73da65956929e36e05e4873c42"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___remap.html#ga0bf08e73da65956929e36e05e4873c42">TIM_TIM24_ETR_SAI1_FSB</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga38cf3fbfe20afba58f315ace95c88016">TIM2_AF1_ETRSEL_2</a></td></tr>
<tr class="memitem:ga4d3d7a7e977f98110d2833d2feb7236a" id="r_ga4d3d7a7e977f98110d2833d2feb7236a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga4d3d7a7e977f98110d2833d2feb7236a">TIM_TIM1_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gabba4a562a6e0f83acf57807e50de0de4" id="r_gabba4a562a6e0f83acf57807e50de0de4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gabba4a562a6e0f83acf57807e50de0de4">TIM_TIM1_TI1_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga94308cf0e1eebb9a46fdd9c907b41cf5" id="r_ga94308cf0e1eebb9a46fdd9c907b41cf5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga94308cf0e1eebb9a46fdd9c907b41cf5">TIM_TIM8_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga226e4035e59e5d1a566d7d673f858f35" id="r_ga226e4035e59e5d1a566d7d673f858f35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga226e4035e59e5d1a566d7d673f858f35">TIM_TIM8_TI1_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga11cd0b8d94b5ab46488aa3f2c3769d1f" id="r_ga11cd0b8d94b5ab46488aa3f2c3769d1f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga11cd0b8d94b5ab46488aa3f2c3769d1f">TIM_TIM2_TI4_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga10665a31da680e9c23ff66b4e9f85b1e" id="r_ga10665a31da680e9c23ff66b4e9f85b1e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga10665a31da680e9c23ff66b4e9f85b1e">TIM_TIM2_TI4_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabe0b9c7718f9609776afdbb0ebcc3832">TIM_TISEL_TI4SEL_0</a></td></tr>
<tr class="memitem:ga4d384c8a9c0687b64290b54c256a5152" id="r_ga4d384c8a9c0687b64290b54c256a5152"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga4d384c8a9c0687b64290b54c256a5152">TIM_TIM2_TI4_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf6106b6c27078a60113e888b0142ccb8">TIM_TISEL_TI4SEL_1</a></td></tr>
<tr class="memitem:ga0449ea1c33b15b3f91222fcb3a239559" id="r_ga0449ea1c33b15b3f91222fcb3a239559"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga0449ea1c33b15b3f91222fcb3a239559">TIM_TIM2_TI4_COMP1_COMP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gabe0b9c7718f9609776afdbb0ebcc3832">TIM_TISEL_TI4SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf6106b6c27078a60113e888b0142ccb8">TIM_TISEL_TI4SEL_1</a>)</td></tr>
<tr class="memitem:ga43e965c08be4bb981520165b1febf6c5" id="r_ga43e965c08be4bb981520165b1febf6c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga43e965c08be4bb981520165b1febf6c5">TIM_TIM3_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gad862ada9f9f69885f4f891cac338eb20" id="r_gad862ada9f9f69885f4f891cac338eb20"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gad862ada9f9f69885f4f891cac338eb20">TIM_TIM3_TI1_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga6d1cab356ab9db2d3a65327992bdf97f" id="r_ga6d1cab356ab9db2d3a65327992bdf97f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga6d1cab356ab9db2d3a65327992bdf97f">TIM_TIM3_TI1_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:gaaf704734fd8855bfcfe8bf8591bd3d53" id="r_gaaf704734fd8855bfcfe8bf8591bd3d53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaaf704734fd8855bfcfe8bf8591bd3d53">TIM_TIM3_TI1_COMP1_COMP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a>)</td></tr>
<tr class="memitem:ga0887eba35836a73c891e2ad168a3da16" id="r_ga0887eba35836a73c891e2ad168a3da16"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga0887eba35836a73c891e2ad168a3da16">TIM_TIM5_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gabe5775cefd01431696ab62620b7a5d6b" id="r_gabe5775cefd01431696ab62620b7a5d6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gabe5775cefd01431696ab62620b7a5d6b">TIM_TIM5_TI1_CAN_TMP</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga41a79c22055cb2f84a9ca574c3ab596c" id="r_ga41a79c22055cb2f84a9ca574c3ab596c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga41a79c22055cb2f84a9ca574c3ab596c">TIM_TIM5_TI1_CAN_RTP</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:ga56544cebe96b454970fd3f754d3c9c49" id="r_ga56544cebe96b454970fd3f754d3c9c49"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga56544cebe96b454970fd3f754d3c9c49">TIM_TIM12_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaf47b84ebb87bad97064fdb017ead9151" id="r_gaf47b84ebb87bad97064fdb017ead9151"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaf47b84ebb87bad97064fdb017ead9151">TIM_TIM12_TI1_SPDIF_FS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga203fd51591dbc76d09a12d1ca4e539a1" id="r_ga203fd51591dbc76d09a12d1ca4e539a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga203fd51591dbc76d09a12d1ca4e539a1">TIM_TIM15_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gad7f0c85a8acd135947bdb67db634e3b1" id="r_gad7f0c85a8acd135947bdb67db634e3b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gad7f0c85a8acd135947bdb67db634e3b1">TIM_TIM15_TI1_TIM2_CH1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:gae48754f7fa79114b029d245eea699b84" id="r_gae48754f7fa79114b029d245eea699b84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gae48754f7fa79114b029d245eea699b84">TIM_TIM15_TI1_TIM3_CH1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:gaf2c8be800c5ea6a82734ade8f5bb5e1e" id="r_gaf2c8be800c5ea6a82734ade8f5bb5e1e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaf2c8be800c5ea6a82734ade8f5bb5e1e">TIM_TIM15_TI1_TIM4_CH1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a>)</td></tr>
<tr class="memitem:ga53599dcd4f5502bf1c76670f03aac081" id="r_ga53599dcd4f5502bf1c76670f03aac081"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga53599dcd4f5502bf1c76670f03aac081">TIM_TIM15_TI1_RCC_LSE</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga1bcab70466ce0c2bf5b052ef9963d0c7">TIM_TISEL_TI1SEL_2</a>)</td></tr>
<tr class="memitem:ga4d4938b548affd930758e2801f48eb07" id="r_ga4d4938b548affd930758e2801f48eb07"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga4d4938b548affd930758e2801f48eb07">TIM_TIM15_TI1_RCC_CSI</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga1bcab70466ce0c2bf5b052ef9963d0c7">TIM_TISEL_TI1SEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a>)</td></tr>
<tr class="memitem:ga2205065d06dc15721f52ccc6c7d6e0eb" id="r_ga2205065d06dc15721f52ccc6c7d6e0eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga2205065d06dc15721f52ccc6c7d6e0eb">TIM_TIM15_TI1_RCC_MCO2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga1bcab70466ce0c2bf5b052ef9963d0c7">TIM_TISEL_TI1SEL_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a>)</td></tr>
<tr class="memitem:gac24fe62f6e315b6bf3315b70e808ef81" id="r_gac24fe62f6e315b6bf3315b70e808ef81"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gac24fe62f6e315b6bf3315b70e808ef81">TIM_TIM15_TI2_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga3116230cad942525244192c4f0bb1fbe" id="r_ga3116230cad942525244192c4f0bb1fbe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga3116230cad942525244192c4f0bb1fbe">TIM_TIM15_TI2_TIM2_CH2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga18532138f0c7423e6acb642933937cbb">TIM_TISEL_TI2SEL_0</a>)</td></tr>
<tr class="memitem:gacc2c94f28892cfbc46fc27bab2d23cdd" id="r_gacc2c94f28892cfbc46fc27bab2d23cdd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gacc2c94f28892cfbc46fc27bab2d23cdd">TIM_TIM15_TI2_TIM3_CH2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac432d94cbea0fec68e3cf56c8b25a532">TIM_TISEL_TI2SEL_1</a>)</td></tr>
<tr class="memitem:gadb9f1861b478966c9329ad9f540a4fcc" id="r_gadb9f1861b478966c9329ad9f540a4fcc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gadb9f1861b478966c9329ad9f540a4fcc">TIM_TIM15_TI2_TIM4_CH2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga18532138f0c7423e6acb642933937cbb">TIM_TISEL_TI2SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gac432d94cbea0fec68e3cf56c8b25a532">TIM_TISEL_TI2SEL_1</a>)</td></tr>
<tr class="memitem:gaf4435f9a5d0eb16d1b2b1192ad004392" id="r_gaf4435f9a5d0eb16d1b2b1192ad004392"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaf4435f9a5d0eb16d1b2b1192ad004392">TIM_TIM16_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga0fbcfc41d3049d0f638e2024c3650a21" id="r_ga0fbcfc41d3049d0f638e2024c3650a21"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga0fbcfc41d3049d0f638e2024c3650a21">TIM_TIM16_TI1_RCC_LSI</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga921143f341cd81c4ce43f3d6ecae9df9" id="r_ga921143f341cd81c4ce43f3d6ecae9df9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga921143f341cd81c4ce43f3d6ecae9df9">TIM_TIM16_TI1_RCC_LSE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:ga9b830fb428d95bee93970c5405fb2fe3" id="r_ga9b830fb428d95bee93970c5405fb2fe3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga9b830fb428d95bee93970c5405fb2fe3">TIM_TIM16_TI1_WKUP_IT</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a>)</td></tr>
<tr class="memitem:gab97c8da0527e5686a80a50f906225e02" id="r_gab97c8da0527e5686a80a50f906225e02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gab97c8da0527e5686a80a50f906225e02">TIM_TIM17_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga3f1415fc8e6bf01ebdfad3c06f3bcc3c" id="r_ga3f1415fc8e6bf01ebdfad3c06f3bcc3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga3f1415fc8e6bf01ebdfad3c06f3bcc3c">TIM_TIM17_TI1_SPDIF_FS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga409efca3f95e233e2bf48908a7e25a94" id="r_ga409efca3f95e233e2bf48908a7e25a94"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga409efca3f95e233e2bf48908a7e25a94">TIM_TIM17_TI1_RCC_HSE1MHZ</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:ga96722a6c22463858abfcafa371a6a835" id="r_ga96722a6c22463858abfcafa371a6a835"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga96722a6c22463858abfcafa371a6a835">TIM_TIM17_TI1_RCC_MCO1</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a>)</td></tr>
<tr class="memitem:gaa2e648e7357bd2545a1eeacd922d0b05" id="r_gaa2e648e7357bd2545a1eeacd922d0b05"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaa2e648e7357bd2545a1eeacd922d0b05">TIM_TIM23_TI4_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaa706392ffbe746d070a46365453eff0e" id="r_gaa706392ffbe746d070a46365453eff0e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaa706392ffbe746d070a46365453eff0e">TIM_TIM23_TI4_COMP1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabe0b9c7718f9609776afdbb0ebcc3832">TIM_TISEL_TI4SEL_0</a></td></tr>
<tr class="memitem:ga19d293cc1ce67979391149b8b9ff7ecb" id="r_ga19d293cc1ce67979391149b8b9ff7ecb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga19d293cc1ce67979391149b8b9ff7ecb">TIM_TIM23_TI4_COMP2</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf6106b6c27078a60113e888b0142ccb8">TIM_TISEL_TI4SEL_1</a></td></tr>
<tr class="memitem:gae33fc9dfbd92dfa798438e41cbe461c7" id="r_gae33fc9dfbd92dfa798438e41cbe461c7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gae33fc9dfbd92dfa798438e41cbe461c7">TIM_TIM23_TI4_COMP1_COMP2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gabe0b9c7718f9609776afdbb0ebcc3832">TIM_TISEL_TI4SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf6106b6c27078a60113e888b0142ccb8">TIM_TISEL_TI4SEL_1</a>)</td></tr>
<tr class="memitem:ga172efd80a7592e1b949d12e7439c0b6a" id="r_ga172efd80a7592e1b949d12e7439c0b6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga172efd80a7592e1b949d12e7439c0b6a">TIM_TIM24_TI1_GPIO</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gafcabd2f57f3e9de1ef4863154ecfe810" id="r_gafcabd2f57f3e9de1ef4863154ecfe810"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gafcabd2f57f3e9de1ef4863154ecfe810">TIM_TIM24_TI1_CAN_TMP</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8352e91e70524bf299ae524b17fc4b2">TIM_TISEL_TI1SEL_0</a></td></tr>
<tr class="memitem:ga668d33771d5bb3601f5981c7d5f7affe" id="r_ga668d33771d5bb3601f5981c7d5f7affe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#ga668d33771d5bb3601f5981c7d5f7affe">TIM_TIM24_TI1_CAN_RTP</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad452efbdd8b96c975f09b1c10eb43c90">TIM_TISEL_TI1SEL_1</a></td></tr>
<tr class="memitem:gaf6550208fd6a5aafc1ed97b65a836dc4" id="r_gaf6550208fd6a5aafc1ed97b65a836dc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___timer___input___selection.html#gaf6550208fd6a5aafc1ed97b65a836dc4">TIM_TIM24_TI1_CAN_SOC</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gabe0b9c7718f9609776afdbb0ebcc3832">TIM_TISEL_TI4SEL_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaf6106b6c27078a60113e888b0142ccb8">TIM_TISEL_TI4SEL_1</a>)</td></tr>
<tr class="memitem:gac11038f927b530ed9ff66cbf88b5fe48" id="r_gac11038f927b530ed9ff66cbf88b5fe48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___private___macros.html#gac11038f927b530ed9ff66cbf88b5fe48">IS_TIM_BREAKINPUT</a>(__BREAKINPUT__)</td></tr>
<tr class="memitem:ga8206e59b599377ce8abb3d806ffcf5a1" id="r_ga8206e59b599377ce8abb3d806ffcf5a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___private___macros.html#ga8206e59b599377ce8abb3d806ffcf5a1">IS_TIM_BREAKINPUTSOURCE</a>(__SOURCE__)</td></tr>
<tr class="memitem:gafea36303ed2332cea12b392d987649e3" id="r_gafea36303ed2332cea12b392d987649e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___private___macros.html#gafea36303ed2332cea12b392d987649e3">IS_TIM_BREAKINPUTSOURCE_STATE</a>(__STATE__)</td></tr>
<tr class="memitem:ga350bdeccbe405fde9ab61b83a53321ea" id="r_ga350bdeccbe405fde9ab61b83a53321ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___t_i_m_ex___private___macros.html#ga350bdeccbe405fde9ab61b83a53321ea">IS_TIM_BREAKINPUTSOURCE_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memitem:ga6c046891b6a59d63c2623b0847524da8" id="r_ga6c046891b6a59d63c2623b0847524da8"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_TIM_TISEL</b>(__TISEL__)</td></tr>
<tr class="memitem:gaa92dfa56d6678471dc301da8f084003b" id="r_gaa92dfa56d6678471dc301da8f084003b"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_TIM_REMAP</b>(__RREMAP__)</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-func-members" class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga70b3896d3c42d92d211c00566c623f71" id="r_ga70b3896d3c42d92d211c00566c623f71"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Init</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___hall_sensor___init_type_def.html">TIM_HallSensor_InitTypeDef</a> *sConfig)</td></tr>
<tr class="memitem:ga61f3c18eb8fe53b65b55ec855072631d" id="r_ga61f3c18eb8fe53b65b55ec855072631d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_DeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga88d9e7c4bc86e1a1190fda06e04552ea" id="r_ga88d9e7c4bc86e1a1190fda06e04552ea"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_MspInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gac19734439bdfa549b7fb5d85f3c0720d" id="r_gac19734439bdfa549b7fb5d85f3c0720d"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_MspDeInit</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga9f4bfa2a4b890a2219ca927bbbb455fc" id="r_ga9f4bfa2a4b890a2219ca927bbbb455fc"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga714c2a7a51f4ab61b04df84ab182eb86" id="r_ga714c2a7a51f4ab61b04df84ab182eb86"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaf3e7068c5bc6fc74e016cc8e990cbb02" id="r_gaf3e7068c5bc6fc74e016cc8e990cbb02"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gac6ab7ab0cada425a8d4deb637bd2ad71" id="r_gac6ab7ab0cada425a8d4deb637bd2ad71"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga3d0d063498f6888d61411d56380f5211" id="r_ga3d0d063498f6888d61411d56380f5211"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:gab361d1aa6e0eb244886b93908beded6f" id="r_gab361d1aa6e0eb244886b93908beded6f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga56d25f544564ef28a66dca7ec150de00" id="r_ga56d25f544564ef28a66dca7ec150de00"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga576cb1c3e40fc49555f232773cb2cdbc" id="r_ga576cb1c3e40fc49555f232773cb2cdbc"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga2f4d7c285095d5293b81d2e11cd991af" id="r_ga2f4d7c285095d5293b81d2e11cd991af"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:gabe91877781dbd7fb9fdd63262e6ea10f" id="r_gabe91877781dbd7fb9fdd63262e6ea10f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga4d82bbece7e69bff83c478bbcf003e1d" id="r_ga4d82bbece7e69bff83c478bbcf003e1d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:ga09216649456d28828492740232b275fd" id="r_ga09216649456d28828492740232b275fd"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OCN_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga4f2b0bb4b66a5acd76eac4e8d32cc498" id="r_ga4f2b0bb4b66a5acd76eac4e8d32cc498"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga0f2e27f3fb6d8f42d998e2071e5f0482" id="r_ga0f2e27f3fb6d8f42d998e2071e5f0482"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga82f0b53f6b10e6aafc6835178662c488" id="r_ga82f0b53f6b10e6aafc6835178662c488"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga13848e20df29fa552ef4f5b69fef20a6" id="r_ga13848e20df29fa552ef4f5b69fef20a6"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga40c945a8c706dbfc1da753fbcb821c4b" id="r_ga40c945a8c706dbfc1da753fbcb821c4b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Start_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)</td></tr>
<tr class="memitem:ga10afdfdc5eed2e0288ccb969f48bc0e4" id="r_ga10afdfdc5eed2e0288ccb969f48bc0e4"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_PWMN_Stop_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channel)</td></tr>
<tr class="memitem:ga41e254708b0215a68acb6e0836d4f8ca" id="r_ga41e254708b0215a68acb6e0836d4f8ca"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OnePulseN_Start</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:gaf42ab805f75ecece735d600e54cabf83" id="r_gaf42ab805f75ecece735d600e54cabf83"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OnePulseN_Stop</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:ga297a97004076cee5734510a0dece7665" id="r_ga297a97004076cee5734510a0dece7665"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OnePulseN_Start_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:ga5b6f320c18f453054a5409db6b98254e" id="r_ga5b6f320c18f453054a5409db6b98254e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_OnePulseN_Stop_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t OutputChannel)</td></tr>
<tr class="memitem:gab5802aa4b8b5a79b93b209b0277622ac" id="r_gab5802aa4b8b5a79b93b209b0277622ac"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_ConfigCommutEvent</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t InputTrigger, uint32_t CommutationSource)</td></tr>
<tr class="memitem:gad9f5f717a203adafb70e66451b4f0472" id="r_gad9f5f717a203adafb70e66451b4f0472"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_ConfigCommutEvent_IT</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t InputTrigger, uint32_t CommutationSource)</td></tr>
<tr class="memitem:ga6ab2af489cfc5783e4ddd76a35edde31" id="r_ga6ab2af489cfc5783e4ddd76a35edde31"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_ConfigCommutEvent_DMA</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t InputTrigger, uint32_t CommutationSource)</td></tr>
<tr class="memitem:ga772129e4fa76d4af34b9b6913698d3c8" id="r_ga772129e4fa76d4af34b9b6913698d3c8"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_MasterConfigSynchronization</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___master_config_type_def.html">TIM_MasterConfigTypeDef</a> *sMasterConfig)</td></tr>
<tr class="memitem:ga5ebf7ce00c211c085633ed1fb964d054" id="r_ga5ebf7ce00c211c085633ed1fb964d054"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_ConfigBreakDeadTime</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, const <a class="el" href="struct_t_i_m___break_dead_time_config_type_def.html">TIM_BreakDeadTimeConfigTypeDef</a> *sBreakDeadTimeConfig)</td></tr>
<tr class="memitem:ga8aef10325df17a0d17a3a0a7ebfae383" id="r_ga8aef10325df17a0d17a3a0a7ebfae383"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_GroupChannel5</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Channels)</td></tr>
<tr class="memitem:ga683118282daf3aa2e319eb8eea93af31" id="r_ga683118282daf3aa2e319eb8eea93af31"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_RemapConfig</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t Remap)</td></tr>
<tr class="memitem:ga5861f4ea858df4905a2f1fdeec6321a1" id="r_ga5861f4ea858df4905a2f1fdeec6321a1"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_TISelection</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t TISelection, uint32_t Channel)</td></tr>
<tr class="memitem:gaa4189b31d2c006ee33f55f8c6eeba930" id="r_gaa4189b31d2c006ee33f55f8c6eeba930"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_CommutCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga971ecdc215921771e56ed2c4944dc0b1" id="r_ga971ecdc215921771e56ed2c4944dc0b1"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_CommutHalfCpltCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga2d868a55ca7c62c4a5ef85dec514402c" id="r_ga2d868a55ca7c62c4a5ef85dec514402c"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_BreakCallback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga1efa3cf97c2c2a7b21a25b55ce2c67fa" id="r_ga1efa3cf97c2c2a7b21a25b55ce2c67fa"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_Break2Callback</b> (<a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:gaa27ea2ed2e334e5fe94b7b9be5af857e" id="r_gaa27ea2ed2e334e5fe94b7b9be5af857e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_HallSensor_GetState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim)</td></tr>
<tr class="memitem:ga974d8474ef6c31a41b46f46d31202888" id="r_ga974d8474ef6c31a41b46f46d31202888"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_TIMEx_GetChannelNState</b> (const <a class="el" href="struct_t_i_m___handle_type_def.html">TIM_HandleTypeDef</a> *htim, uint32_t ChannelN)</td></tr>
<tr class="memitem:gaf473fa38254d62a74a006a781fe0aeb8" id="r_gaf473fa38254d62a74a006a781fe0aeb8"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIMEx_DMACommutationCplt</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
<tr class="memitem:ga65b7244a1ee94cf20081543377ba8d2a" id="r_ga65b7244a1ee94cf20081543377ba8d2a"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>TIMEx_DMACommutationHalfCplt</b> (<a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *hdma)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Header file of TIM HAL Extended module. </p>
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
<p>Copyright (c) 2017 STMicroelectronics. All rights reserved.</p>
<p>This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS. </p>
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